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        <title>LMARV-1: A RISC-V processor you can see. Part 1: 32-bit registers</title>
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        <description>The LMARV-1 (Learn Me A Risc-V, version 1) is a RISC-V processor built out of MSI and LSI chips. You can point to pieces of the processor and see the data flow. It should be a nice way of demonstrating how RISC-V works and how simple it is to implement. RISC-V specs: https://riscv.org/specifications/ Github for KiCAD schematics and gerbers: https://github.com/RobertBaruch/lmarv</description>
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